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3.3 Test chip SCC registers

This section describes the SCC registers. It contains the following subsections:

• Test chip SCC register overview

• Test chip SCC register summary on page 3-13

• Test chip SCC register descriptions on page 3-17.

3.3.1 Test chip SCC register overview

The SCC register interface enables configuration at power-up in addition to the reading and

writing of system parameters. The SCC registers use a dedicated interface to the Daughterboard

Configuration Controller that communicates with the MCC over an SPI interface.

The MCC on the motherboard reads the

config.txt

and

board.txt

configuration files and uses

the Daughterboard Configuration Controller to configure the motherboard and attached

daughterboards. The Daughterboard Configuration Controller loads some of the registers in the

test chip SCC.

Run-time read and write operations are performed through the SYS_CFG registers, or directly

through the APB interface at base address

0x00_7FFF_0000

Note

ARM recommends that, where possible, you perform all system configuration by loading

configuration files into the microSD card on the motherboard rather than writing directly to the

test chip controller. The settings in the

board.txt

file are applied to the daughterboard before

reset is released.

You can read and write to the Cortex-A15_A7 test chip SCC registers as follows:

• The interface supports word writes to the configuration controller registers.

• Writes to read-only registers are ignored.

• Writes to unused words fail.

• ARM recommends that you use a read-modify-write sequence to update the configuration

controller registers.

• Read accesses to the peripheral support reading back 32 bits of the register at a time.

• Reads from unused words in the register return zero.

• The base address of the SCC registers is

0x00_7FFF_0000

1 2 ... 64 65 66 67 68 69 70 71 72 73 74 ... 177 178

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ARM AMBA NIC-301 Specifiche Pagina 69