ARM AMBA NIC-301 manuali

Arm AMBA NIC-301 Manuale Utente (24 pagine)

Marchio: Arm | Categoria: Networking | Dimensione: 0.65 MB |

Indice

1 Reducing latency

2 Vybrid architecture

3 Architectural key points

3.2.1 Sharing NIC nodes

3.3 NIC priorities

3.4 NIC transfer latency

3.5 NIC buffering

3.7 Locking NIC

3.8 Cache usage

Architectural key points

4 Dual-core solutions

4.1.1 Boot

4.1.2 Memory configurations

4.1.3 Enabling a second core

Figure 5. Dual-core start

4.1.4 Sharing peripherals

5 Latency measurement

Latency measurement

6Conclusion

7 References

References

Document Number: AN4947

How to Reach Us:

Arm AMBA NIC-301 Guida Utente (54 pagine)

Marchio: Arm | Categoria: Networking | Dimensione: 0.49 MB |

Indice

Technical Reference Manual

Contents

Reference Manual

List of Tables

List of Figures

• About this book on page vii

• Feedback on page ix

About this book

Preface

Feedback

Chapter 1

Introduction

ID031010 Non-Confidential

1.2 Key features

1.4 Product revisions

Chapter 2

Functional Description

2.1 About the functions

2.2 Interfaces

Combination 1

Combination 2

Combination 3

Combination 4

Error response

Lock transactions

Configuration options

2.3 Operation

INCR burst type Converted to

Aligned INCR4 INCR8

Unaligned INCR4 INCR7

Aligned INCR9 INCR15 + INCR2

FIXED burst type Converted to

FIXED1 INCR2

FIXED2 INCR2 + INCR2 +

Figure 2-2 Remap set to 001

Figure 2-3 Remap set to 010

101, Slave 1 is removed

Chapter 3

Programmers Model

Type Width

Appendix A

Revisions

Change Location Affects

No technical changes -

Glossary

A 32-bit data item

Arm AMBA NIC-301 Specifiche (178 pagine)

Marchio: Arm | Categoria: Networking | Dimensione: 1.61 MB |

Indice

CoreTile

Express A15×2 A7×3

CoreTile Express A15×2 A7×3

CE Declaration of Conformity

Contents

Appendix B HDLCD controller

Appendix D Revisions

• About this book on page vii

• Feedback on page xi

About this book

Preface

ID062813 Non-Confidential

Feedback

Chapter 1

Introduction

1.2 Precautions

Chapter 2

Hardware Description

MBM_nRST

Internal resets

0x0000_0000

2.7 Clocks

(CLKF + 1)

(CLKOD + 1) (CLKR + 1)x

2.8 Interrupts

2.8.2 Interrupts

2.9 HDLCD

2.10 DDR2 memory interface

2.11 Debug

Components Technical

Reference Manual

Chapter 3

UNPREDICTABLE behavior

3.2 Daughterboard memory map

You can access NOR 0 at

and at

0x00_0000_0000

3.3 Test chip SCC registers

SMC_ADDR_MATCH1_0

SMC_ADDR_MASK1_0

DMA_BOOT_ADDR

DAP ROM Default Target ID

DAP ROM Default Instance ID

A15_CRNTCLK[3:0]

A7_CRNTCLK[3:0]

31 16 15 8 0

Programmers Model

100

0x000A50F5 to the

108

Cortex-A15_A7 CPU ID

110

0x2A43_0000

119

Reserved

120

0x2A80_0000

126

CNTPL0ACR

136

CNTP_TVAL

139

CNTVL_CVAL

140

Appendix A

147

Signal Descriptions

147

HDRXHDRY

148

TRACE (DUAL) TRACE (SINGLE)

148

Figure A-2 HSB multiplexing

149

A.3 Header connectors

151

Appendix B

155

HDLCD controller

155

B.1 Introduction

156

B.2 HDLCD Programmers Model

157

31 16 15 8 7 0

158

FB_BASE_ADDR

163

FB_LINE_COUNT

164

RESERVED

164

FB_LINE_PITCH

165

31 12 11 0

167

Reserved V_SYNC

167

Reserved V_BACK_PORCH

167

Reserved V_DATA

168

Reserved V_FRONT_PORCH

168

Reserved H_SYNC

169

Reserved H_BACK_PORCH

169

Reserved H_DATA

170

Reserved H_FRONT_PORCH

170

31 30 5432 0

173

BIG_ENDIAN

173

BYTES_PER_PIXEL

173

Appendix C

175

Electrical Specifications

175

C.1 AC characteristics

176

Appendix D

177

Revisions

177

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ARM AMBA NIC-301 manuali

Arm AMBA NIC-301 Manuale Utente (24 pagine)

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Arm AMBA NIC-301 Guida Utente (54 pagine)

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Arm AMBA NIC-301 Specifiche (178 pagine)

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ARM dispositivi