
Hardware Description
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 2-35
ID062813 Non-Confidential
Figure 2-13 CoreTile Express A15×2 A7×3 daughterboard interrupt overview
2.8.2 Interrupts
Table 2-11 shows the interrupts from the motherboard IOFPGA, the interrupts from the test chip
peripherals, the interrupts from the MPCore cluster, and the reserved interrupts.
Cortex-A15_A7
Test Chip
Motherboard IO FPGA
Motherboard Express μATX
V2M-P1
CoreTile Express A15x2 A7x3
Daughterboard
HDRY1
HDRY
SB_IRQ
26 signals
Cortex-A15
MPCore Cluster
GIC-400 interrupt controller
LogicTile Express
FPGA Daughterboard
HDRY2
HDRY
SB1_INT[3:0]
FPGA
SB2_INT[3:0]
Site 1
Site 2
Cortex-A7
MPCore Cluster
32 private peripheral
connections between
CPUs and GIC
21 test chip
interrupts
8 interrupts
12 interrupts
Table 2-11 Interrupts
GIC
interrupt
SB_IRQ[]
interrupt
from the
motherboard
Source Signal Description
0:31 Not applicable MPCore cluster - Private peripheral connections between cores
and GIC
32 0 IOFPGA WDOG0INT Watchdog timer
33 1 IOFPGA SWINT Software interrupt
34 2 IOFPGA TIM01INT Dual timer 0/1 interrupt
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