
Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-82
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Figure 3-54 System counter CNTP_TVAL Register bit assignments
Table 3-79 shows the bit assignments.
CNTP_CTL
The CNTP_CTL Register characteristics are:
Purpose The CNTP_CTL register is the physical timer control register. It enables
you to read and write the physical timer control settings.
Usage constraints There are no usage constraints.
Configurations Not applicable.
Attributes See Table 3-68 on page 3-76.
Figure 3-55 shows the bit assignments.
Figure 3-55 System counter CNTP_CTL Register bit assignments
Table 3-80 shows the bit assignments.
31 0
0 00000 0 000000000000 0000 000000 00
0
CNTP_TVAL
Table 3-79 System counter CNTP_TVAL Register bit assignments
Bits Name Function
[31:0] CNTP_TVAL System timer value
31 0
0 00000 0 000000000000 0000 000000 00
0
Reserved
4321
IMSTAT
ISTAT
IMSK
EN
Table 3-80 System counter CNTP_CTL Register bit assignments
Bits Name Function
[31:4] - Reserved. Do not modify.
[3] IMSTAT Interrupt status after masking:
b0
Interrupt asserted.
b1
Interrupt not asserted.
The default is
b0
.
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