ARM AMBA NIC-301 Specifiche Pagina 108

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Programmers Model
ARM DDI 0503F Copyright © 2012-2013 ARM. All rights reserved. 3-51
ID062813 Non-Confidential
Test chip SCC Register APB_CLEAR
The APB_CLEAR Register characteristics are:
Purpose Write
0x000A50F5 to the
APB_CLEAR register to revert all SCC registers
to their test chip default values.
Usage constraints There are no usage constraints.
Configurations Not applicable.
Attributes See Table 3-6 on page 3-13.
Figure 3-27 shows the bit assignments.
Figure 3-27 Test chip APB_CLEAR Register bit assignments
[11] CA15_WFE_NOP_ENABLE Recommends boot firmware or operating system action:
b0
Do not treat WFEs as NOPs.
b1
Treat WFEs as NOPs.
The default is
b0
.
This bit has no direct effect but when it is
b1
it acts as a hint to
the software, such as the boot software, to enable bit[7] of the
CA15 Auxiliary Control Register for each core in the CA15.
This results in WFE instructions being executed as NOP
instructions.
See Cortex
®
-A15 Technical Reference Manual.
Note
You can use this method as an alternative to the work-around
to the Cortex A15_A7 defect that bit[14] of this register
describes.
[10:2] - Reserved. Do not modify.
[1:0] ACTIVE_CLUSTER[1:0] Denotes the active clusters:
b01
The Cortex-A15 cluster is active and the
Cortex-A7 cluster is inactive.
b10
The Cortex-A15 cluster is inactive and the
Cortex-A7 cluster is active.
b11
The Cortex-A15 cluster is active and the
Cortex-A7 cluster is active
The default is
b11
.
Table 3-28 Test chip CFGREG48 Register bit assignments (continued)
Bits Name Function
31 0
0 00000 0 0000000000000 0000 000000 00
APBCLEAR
24 23 16 15 8 7
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